Overview & Controls
The Devil V2.0 is a three-stage JFET high-gain distortion derived from Joe Davisson's "Vulcan" circuit. It chains three identical common-source JFET gain stages with very high drain resistors, separated by silicon diodes that sit in series with the signal between stages — a Davisson signature that produces the asymmetric, harmonically-rich saturation the design is known for. After the second stage, an active mid-control tone stack and a bass character switch shape the final voicing before the third stage and output level pot.
The Devil V2.0 prototype — three knobs (GAIN, MID, LEVEL), one toggle (bass character), one footswitch
Front-panel controls
| Control | Type | Function |
|---|---|---|
| GAIN | 1 M log | Sets drive at the output of the first JFET stage. CW = more saturation, less clean headroom. |
| MID | 100 k reverse-log | Sweeps the amount of mid-frequency content shunted to ground at the second-stage output. Voicing knob — anywhere from scooped to mid-forward. |
| LEVEL | 100 k log | Output volume. Plenty of gain on tap — this pedal will easily overdrive most amp inputs. |
| SW1 | SPDT toggle | Bass character: position 1 (47 n) = fatter, more low-mid content; position 2 (22 n) = tighter, more focused. |
Circuit Theory
Devil V2.0 schematic — three JFET common-source stages with inter-stage silicon clipping and mid-sweep tone stack
Signal flow: input → R1‖R2 pull-down → C1 DC block → D1 → Q1 (JFET stage 1) → GAIN pot → C4 → R6 → D2 → Q2 (JFET stage 2) → tone stack (MID + SW1 bass switch) → D3 → Q3 (JFET stage 3) → C8 → R16+R17 → LEVEL pot → output. Each gain stage is mechanically and electrically identical apart from the trimpot reference.
Identical JFET gain stages (×3)
Each of Q1, Q2, Q3 is a common-source amplifier built around the PF5102 (or J201/2N5457). The drain pulls up through a very large 10 M resistor (R3, R8, R13) in series with the trim network — the unusually-large drain resistor is what gives a Davisson-style stage its high voltage gain. The drain bias is set by the 20 k fixed resistor (R21, R4, R20) in series with the 50 k trimpot (R14, R9, R22), both feeding from the regulated supply rail. The source resistor is 47 k (R5, R10, R15) with a 1 µF electrolytic bypass (C3, C7, C9) across it — the bypass cap effectively shorts the source resistor for AC, so the stage runs at full unbypassed gain across the audio band (the bypass corner sits well below 4 Hz).
Inter-stage series clipping diodes (D1, D2, D3)
Between every gain stage sits a 1N914 silicon diode in series with the signal path, with the cathode toward the previous stage and the anode at the next stage's gate. Because the JFET gate is held at a high DC level by its 10 M drain resistor, the diode is reverse-biased at rest. AC signal swings from the previous stage modulate this bias; when the signal swings hard enough in one direction the diode is driven forward and conducts, in the other direction it stays cut off and blocks signal. The result is an asymmetric series clipper that reshapes the waveform between every stage — it is the single biggest contributor to the Devil's character. This is a Joe Davisson signature trick.
GAIN control
The GAIN pot (1 M log) sits between Q1's output and the second stage. It is wired as a variable shunt — wiper to ground via C3's lower end, top of element fed from Q1 source through C2 (100 n). This sets how much of Q1's output reaches the inter-stage network feeding Q2. Turn it up and you push Q2 (and consequently D2, then Q3 and D3) harder into clipping.
Mid-sweep tone stack and bass switch
After the second stage, an interactive RC network shapes the tone before the third stage. R11 (33 k) and R12 (33 k) form a series path between Q2's output and Q3's input, with C11 (1 n) bridging the same two points. C12 (1 n) shunts to ground at the mid-tap — and SW1 adds either C14 (47 n) or C15 (22 n) in parallel with C12 to deepen the low-frequency shunt for one of two character settings. The MID pot (100 k reverse-log) is a variable shunt-to-ground via C13 (100 n) at Q2's output node — sweep it through its range to scoop or boost mids. The reverse-log taper compensates for the perceptual non-linearity of mid response so the knob feels approximately linear by ear. R19 (1 M) at the third-stage input sets the input impedance and load presented to the tone stack.
Output stage
Q3's drain output is DC-blocked by C8 (100 n), then attenuated by the divider R16 (470 k) + R17 (470 k) before reaching the LEVEL pot (100 k log). This combination scales the very-high signal level coming out of the third clipping stage down to a usable output range and keeps the LEVEL pot operating in the most useful part of its travel.
Power supply
D4 (1N4001) provides reverse-polarity protection at the +9 V input. R18 (100 R) and C10 (100 µF) form a series-RC supply lowpass filter for the gain stages — corner around 16 Hz, which keeps power-rail ripple and switching artefacts well out of the audio band. The whole circuit runs straight off the filtered 9 V — there is no virtual-ground reference and no charge pump.
Stage Analysis
The Devil's three gain stages are all identical in topology and component values. Voltage gain of a common-source JFET stage is Av ≈ −gm × Rd, but the practical value depends strongly on the JFET's individual transconductance — PF5102 typically sits in the 1–4 mA/V range at the bias point used here. With 10 M sitting at the drain (R3/R8/R13), the small-signal voltage gain of an unbypassed stage is enormous on paper; in practice each stage is rapidly driven into JFET self-clipping and the inter-stage series diodes hard-clip what's left, so headline gain numbers are not particularly meaningful.
Stage 1 — Q1
Stage 2 — Q2
Stage 3 — Q3
Inter-stage clipping (D1, D2, D3)
Tone stack approximate corners
The mid-control tone stack between Q2 and Q3 is a heavily-interacting RC network — the bass switch, the MID pot setting, R11+R12, and the cap stack all influence each other. The numbers below are approximate single-pole RC corners assuming the rest of the network is at high impedance:
| Mechanism | Components | Approx. corner | Effect |
|---|---|---|---|
| Treble shunt (always) | R11 (33 k) + C12 (1 n) | ≈ 4.8 kHz | Sets the high-frequency roll-off — fixed. |
| Bass switch — fat | R11 (33 k) + 48 n total (C12+C14) | ≈ 100 Hz | SW1 to C14 — fatter, more low-mid weight. |
| Bass switch — tight | R11 (33 k) + 23 n total (C12+C15) | ≈ 210 Hz | SW1 to C15 — tighter, more focused. |
| Mid shunt (variable) | C13 (100 n) + MID 0–100 k | ≈ 16 Hz – ∞ | Higher pot resistance = less mid cut. Sweeping the MID pot moves the depth of the mid notch. |
| Q2→Q3 bridging | R12 (33 k) + C11 (1 n) | ≈ 4.8 kHz | Cross-feed cap — preserves high-frequency content past the mid-shunt network. |
Bill of Materials
| Ref | Qty | Value | Colour code | Notes |
|---|---|---|---|---|
| Resistors — 1% metal film, ¼ W | ||||
| R1, R2, R7, R19 | 4 | 1 M | Brown · Black · Black | Yellow · Brown | Input pull-down (R1, R2), inter-stage / Q3 input pull-downs (R7, R19) |
| R3, R8, R13 | 3 | 10 M | Brown · Black · Black | Green · Brown | JFET drain pull-ups — set the very high voltage gain of each common-source stage |
| R4, R20, R21 | 3 | 20 k | Red · Black · Black | Red · Brown | Drain bias fixed leg — series with the 50 k trimpot for each stage |
| R5, R10, R15 | 3 | 47 k | Yellow · Violet · Black | Red · Brown | JFET source resistors — set the operating point and bias voltage |
| R6 | 1 | 2.2 M | Red · Red · Black | Yellow · Brown | Inter-stage isolation between GAIN pot output and Q2 input clipping diode |
| R11, R12 | 2 | 33 k | Orange · Orange · Black | Red · Brown | Tone stack series resistors — set HF roll-off corner with C11/C12 |
| R16, R17 | 2 | 470 k | Yellow · Violet · Black | Orange · Brown | Output divider — scales Q3 drain swing down before the LEVEL pot |
| R18 | 1 | 100 Ω | Brown · Black · Black | Black · Brown | Power-supply RC filter resistor (with C10) |
| Trimpots | ||||
| R9, R14, R22 | 3 | 50 k | 6 mm cermet trimpots (Bourns 3296 / Piher PT-6 / similar). Drain bias fine-tune for Q1, Q2, Q3 — set to mid-position by default; see §06 for biasing notes | |
| Capacitors — Film (non-polarised) | ||||
| C1 | 1 | 10 n | Input DC block / HP filter (≈ 32 Hz with R1‖R2) | |
| C2, C4, C6, C8, C13 | 5 | 100 n | Box film. Inter-stage DC blocks (C2, C4, C6, C8) and tone-stack mid-shunt cap (C13) | |
| C11, C12 | 2 | 1 n | Tone stack — high-frequency content. C11 = bridging, C12 = treble shunt to ground | |
| C14 | 1 | 47 n | SW1 position 1 — fat bass character | |
| C15 | 1 | 22 n | SW1 position 2 — tight bass character | |
| Capacitors — Ceramic / Mica | ||||
| C5 | 1 | 100 p | Ceramic disc or silver mica — high-frequency cleanup at the GAIN pot wiper | |
| Capacitors — Electrolytic (polarised) | ||||
| C3, C7, C9 | 3 | 1 µF | JFET source bypass caps — short the source resistor for AC. Observe polarity (long leg = +, + side faces source) | |
| C10 | 1 | 100 µF | Power-supply bulk cap — observe polarity | |
| Semiconductors | ||||
| Q1, Q2, Q3 | 3 | PF5102 | N-channel JFET, TO-92 (D-S-G pinout). J201 2N5457 are pin-compatible drop-ins if you have authentic stock — PF5102 is recommended because it's still in regular production at major distributors and rarely faked. See §06 for biasing | |
| D1, D2, D3 | 3 | 1N914 | Inter-stage series clipping diodes — observe cathode stripe. 1N4148 is a direct equivalent | |
| D4 | 1 | 1N4001 | Reverse-polarity protection on the +9 V input | |
| Pots | ||||
| GAIN | 1 | 1 M log (A) | 16 mm PCB-mount pot. A taper = log in European/Japanese convention | |
| MID | 1 | 100 k reverse log (C) | 16 mm PCB-mount pot. Reverse-log taper makes the mid sweep feel approximately linear by ear | |
| LEVEL | 1 | 100 k log (A) | 16 mm PCB-mount pot | |
| Switch & hardware | ||||
| SW1 | 1 | SPDT toggle | On-on. Bass character switch — selects C14 (fat) or C15 (tight) | |
Build Guide
Component placement (silkscreen)
Populated PCB — front side
Standard through-hole population order — lowest profile first, tallest last. The pots are board-mounted on the back side of the PCB and are fitted last, after the front side is fully populated and inspected.
Small signal diodes
Solder D1, D2, D3 (1N914) and D4 (1N4001) — observe the cathode stripe against the silkscreen mark. The 1N914 is a small glass package; the 1N4001 is the larger black plastic one. Get these in first while the board is empty and easy to handle.
Resistors
Populate all 22 resistors. They lie flat against the board and have no polarity. The values present in this build are 100 Ω, 1 M, 2.2 M, 10 M, 20 k, 33 k, 47 k and 470 k — measure with a meter rather than relying on colour bands if you are unsure. Take particular care to put R3 / R8 / R13 (10 M, Brown-Black-Black-Green-Brown) in the correct three positions: they are visually similar to other large-value resistors but matter a great deal to gain.
Trimpots (R9, R14, R22)
Three 50 k cermet trimpots, 6 mm body, square-pin pattern. They only fit one way around. Set each to roughly mid-position before soldering. See §06 — the trimmers usually do not need to be touched, but they are there for the rare outlier transistor.
Transistors
Q1, Q2, Q3 = PF5102 (or J201 / 2N5457 — see BOM notes). All TO-92, D-S-G pinout. Match the flat side of the package to the silkscreen flat. Sockets are optional but useful if you plan to experiment with different JFETs. The docx mentions: per the original build experience, every PF5102 tested fell inside the working range without ever needing the trim — but the trimmers are there in case you draw an outlier.
Ceramic capacitor
C5 (100 pF, ceramic disc or silver mica). No polarity, push fully home, solder, clip leads.
Film capacitors
Box film capacitors next: C1 (10 n), C2/C4/C6/C8/C13 (5× 100 n), C11/C12 (1 n), C14 (47 n), C15 (22 n). No polarity. Push each one fully against the board so it does not stand proud — these are often the tallest non-electrolytic parts on the front side.
Electrolytic capacitors
C3, C7, C9 (3× 1 µF) and C10 (100 µF). Polarity matters — long leg = positive. Match against the + symbol on the silkscreen and the stripe on the can. Install C10 last among the electros if it stands tallest.
Inspect the front side
Before flipping the board to fit the pots, inspect every solder joint under good light. Check resistor values one more time, electrolytic and diode polarities, and look for cold joints, bridges and any flux residue you want to clean.
Pots and SW1 (back side)
Flip the PCB. Cover the back of each pot body with a small piece of insulation tape or kapton — this prevents any of the freshly-soldered pin tips on the front side from shorting against the metal pot body. Snip off the locating brackets on top of the pot housings if your enclosure does not have the matching alignment slots. Insert all three pots and SW1, push them firmly against the board so they seat fully, then solder.
Off-board wiring
IN, GND and OUT pads sit at the corners — wire to the input jack, output jack and the +9 V / GND of your power source. See §07 for the standard pedal wiring layout.
Back side after fitting the pots and SW1 — cover the pot backs with tape before soldering to avoid shorts
Biasing & Setup
Each JFET stage's drain bias is set by the 20 k fixed + 50 k trimpot network feeding the +9 V rail. The drain idle voltage is what the trimmer adjusts — the goal is to land each drain somewhere around the middle of the available headroom so the stage has symmetric room to swing in both directions before clipping into the rails. PF5102, J201 and 2N5457 vary considerably in IDSS and pinch-off, so per-device bias adjustment can be useful for outliers.
Adjusting if needed
If a stage misbehaves: power the pedal up, leave the input disconnected, and measure the drain voltage of the misbehaving JFET to ground with a DMM. Aim for a drain voltage around 4–5 V with a 9 V supply — that gives the stage roughly equal swing room above and below the bias point. Turn the corresponding trimmer slowly to reach that range. Once all three stages sit in the 4–5 V drain range, reconnect the input and listen — the pedal should now be working normally.
JFET drain pin reference
| JFET stage | Trimmer | Drain probe point | Target idle VD |
|---|---|---|---|
| Q1 (input stage) | R14 | Q1 drain pad / top side of R3 | ≈ 4–5 V |
| Q2 (mid stage) | R9 | Q2 drain pad / top side of R8 | ≈ 4–5 V |
| Q3 (output stage) | R22 | Q3 drain pad / top side of R13 | ≈ 4–5 V |
Experimentation
Once it's working, the trimmers also become a tone-shaping tool. Pulling each stage's drain up toward the rail changes the symmetry of how the next inter-stage diode (D1/D2/D3) clips it — in some cases noticeably alters the harmonic content of the pedal. Try moving R9 (the middle stage) most aggressively if you're after voicing changes; Q2 sits between two clipping diodes and has the most influence on overall character.
Wiring
The Devil uses standard true-bypass pedal wiring. Three connections come off the PCB at the IN, GND and OUT corner pads:
| PCB pad | Wire to |
|---|---|
| IN | Tip (signal) lug of the input jack — through the 3PDT footswitch in a true-bypass arrangement, if used |
| OUT | Output side of the 3PDT switch (or directly to output jack tip if using a buffered/always-on layout) |
| GND | Sleeve of both jacks (typically through the input jack's sleeve, which carries chassis ground). Also tie to the negative side of the DC jack |
| +9V | Centre-negative DC jack tip — the standard Boss-style polarity. D4 protects against reverse polarity |
Suggested enclosure layout
1590B fits comfortably with three 16 mm pots and a small SPDT toggle, plus the footswitch and a status LED. Top row: GAIN — MID — LEVEL. SW1 toggle goes to the left or below the LED depending on enclosure. Top jacks (input on the right, output on the left when looking at the back of a top-mount-jack enclosure, mirroring the signal flow inside). See the prototype photo at the top of §01 for one workable layout.
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